M306H5MG-XXXFP Datasheet, PDF (1/324 Pages) Renesas Technology Corp – SNGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER

M306H5MG-XXXFP/MC-XXXFP/FGFP
SNGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA ACQUISITION CONTROLLER
REJ03B0095-0100Z
Rev.1.20
Dec 13, 2005
1. DESCRIPTION
The M306H5MG/MC-XXXFP and M306H5FGFP are single-chip microcomputers using the high-perfor-
mance silicon gate CMOS process using a M16C/60 Series CPU core and is packaged in a 116-pin plastic
molded QFP. This single-chip microcomputer operates using sophisticated instructions featuring a high
level of instruction efficiency. With 1M bytes of address space, this is capable of executing instructions at
high speed. This also features a built-in data acquisition circuit, making this correspondence to Global
broadcasting service.
1.1 Features
• Memory capacity .................................. <ROM>256K/128K bytes
<RAM>8K/5K bytes
• Shortest instruction execution time ...... 62.5 ns (f(XIN)=16 MHz)
• Supply voltage ..................................... VCC1=3.00 V to VCC2, VCC2=4.5 V to 5.5V(at f(XIN)=16 MHz)
VCC1=2.00 V to VCC2, VCC2=2.00V to 5.5V(at f(XCIN)=32kHz)
*VCC2=2.0 V to 2.9 V: Operates only in the low power
dissipation mode
• Interrupts .............................................. 25 internal and 8 external interrupt sources, 4 software
interrupt sources; 7 levels (Including key input interrupt)
• Multifunction 16-bit timer ...................... 5 output timers + 6 input timers
• Serial I/O .............................................. 5 channels
UART/clock synchronous: 3
Clock synchronous: 2
• DMAC .................................................. 2 channels (trigger: 24 sources)
• A-D converter ....................................... 8 bits X 8 channels (Expandable up to 10 channels)
• CRC calculation circuit ......................... 1 circuit
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 87 lines (P6 to P7, P80 to P84: Can be used as 3.3 V interface)
_______
• Input port .............................................. 1 port (P85 shared with NMI pin)
• Output port ........................................... 1 port (P11 shared with SLICEON pin)
• Chip select output ................................ 4 lines
• Clock generating circuit ....................... 2 built-in circuits
(built-in feedback resistor, external ceramic or crystal oscillator is required)
• Data acquisition circuit ......................... For PDC, VPS, EPG-J, XDS and WSS
1.2 Applications
DVD recorder, HDD recorder
Rev.1.20 Dec 13, 2005 page 1 of 323
REJ03B0095-0100Z