HYS64T32000HM Datasheet, PDF (6/44 Pages) Qimonda AG – 214-Pin Micro-DIMM-DDR2-SDRAM Modules

Internet Data Sheet
HYS64T[32/64]0[0/2]0HM–[3S/3.7/5]–A
Micro-DIMM DDR2 SDRAM Modules
2
Pin Configuration
This chapter contains the pin configuration.
2.1
Pin Configuration
The pin configuration of the DDR2 SDRAM Micro-DIMM is listed by function in Table 5 (214 pins). The abbreviations used in
columns Pin and Buffer Type are explained in Table 6 and Table 7 respectively. The pin numbering is depicted in Figure 1.
Ball No.
Name
Clock Signals
122
CK0
194
CK1
123
CK0
195
CK1
43
CKE0
147
CKE1
NC
Control Signals
165
S0
62
S1
NC
163
RAS
60
CAS
56
WE
Address Signals
55
BA0
162
BA1
46
BA2
NC
Pin
Type
Buffer
Type
Function
TABLE 5
Pin Configuration of MDIMM
I
SSTL
Clock Signal CK 1:0, Complementary Clock Signal CK 1:0
I
SSTL
I
SSTL
I
SSTL
I
SSTL
Clock Enables 1:0
I
SSTL
Note: 2-rank module
NC
Not Connected
Note: 1-rank module
I
SSTL
Chip Select Rank 1:0
I
SSTL
Note: 2-rank module.
NC
Not Connected
Note: 1-rank module
I
Row Address Strobe (RAS), Column Address Strobe (CAS), Write
I
SSTL
Enable (WE)
I
SSTL
I
SSTL
Bank Address Bus 1:0
I
SSTL
I
SSTL
Bank Address Bus 2
Note: Greater than 512Mb DDR2 SDRAMS
NC
–
Not Connected
Note: Less than 1Gb DDR2 SDRAMS
Rev. 1.11, 2006-11
6
03062006-HT1R-Z2PY