HYS64T256020EDL Datasheet, PDF (6/51 Pages) Qimonda AG – 200-Pin SO-DIMM DDR2 SDRAM Modules

Internet Data Sheet
HYS64T[128/256]020EDL-[25F/2.5/3/3S/3.7]-C
SO-DIMM DDR2 SDRAM Module
2
Pin Configuration
The pin configuration of the Small Outline DDR2 SDRAM DIMM is listed by function in Table 5 (200 pins). The abbreviations
used in columns Pin Type and Buffer Type are explained in Table 6 and Table 7 respectively. The Pin numbering is depicted
in Figure 1.
Pin No.
Clock Signals
30
164
32
166
79
80
Control Signals
110
115
108
113
109
Address Signals
107
106
85
Name Pin Buffer Function
Type Type
TABLE 5
Pin Configuration of SO-DIMM
CK0
I
CK1
I
CK0
I
CK1
I
CKE0 I
CKE1 I
NC
NC
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
—
Clock Signals 2:0, Complement Clock Signals 2:0
Clock Enable Rank 1:0
Note: 2 Ranks module
Not Connected
Note: 1-rank module
S0
S1
NC
RAS
CAS
WE
I
SSTL Chip Select Rank 1:0
I
SSTL ^{Note: 2 Ranks module}
NC —
Not Connected
Note: 1-rank module
I
SSTL Row Address Strobe
I
SSTL Column Address Strobe
I
SSTL Write Enable
BA0
I
SSTL Bank Address Bus 2:0
BA1
I
SSTL
BA2
I
SSTL Bank Address Bus 2
Greater than 512Mb DDR2 SDRAMS
NC
NC SSTL Less than 1Gb DDR2 SDRAMS
Rev. 1.0, 2007-03
6
11212006-D34H-5W6Z