PT8146 Datasheet, PDF (8/27 Pages) Princeton Technology Corp – 8-Bit 12-Ch I/O DAC

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8-Bit 12-Ch I/O DAC
EXPANDER STATUS REGISTER (CHANNEL SELECT = “1111”)
PT8146
S hift register
DF DE DD DC DB DA D9 D8 D7 D6 D5 D4
ESR
D ₁₁
D ₁₀
D₉
D₈
D₇
D₆
D₅
D₄
D₃
D₂
D₁
D₀
This register sets the status of each pin.
Setting
“0”
“1”
Pin Status
Input standby status (Hi-Z output)
D11 to D4 pins for analog output should be set to “0”.
Output state
Note: After power VCCD is turned on, the state of pins and registers is as follows:
Pin
AO1 to AO4
D11/AO5 to D4/AO12
D3 to D0
“L” output
Hi-Z state (input state)
Hi-Z state (input state)
State
Pin
Shift register
D/A register
Parallel output register
Expander Status Register
(ESR)
State
Bits DF to D8 are “0”, and D7 to D0 are not defined (retain prior status)
All reset to “0”
Not defined (retain prior state)
All reset to “0”
ESR settings have priority in determining pin states. Switching between input standby state and
analog output state is enabled even when the ESR value is “1”. When the ESR value returns to “0”, the
pin returns to its previously defined state.
In input standby state with AO set for Hi-Z output, the AO output setting can be used for transitions to
AO output state.
PT8146 V1.1
-8-
February, 2006