PT8146 Datasheet, PDF (4/27 Pages) Princeton Technology Corp – 8-Bit 12-Ch I/O DAC

8-Bit 12-Ch I/O DAC
PIN DESCRIPTION
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PT8146
Pin Name
AO1 to AO4
D11/AO5 to
D4/AO12
VDD*1
VCCD*1
D3 to D0
CLK*2
SI*2
SO
/CS*2
VCCA*1
GND
Description
Pin No.
D/A converter analog output pins (VDD to GND output).
(Default: output #00 setting level)
1 to 4
These pins may be used as either I/O expander parallel input/output
(VCCA/GND output 0.5 VCCA/0.2 VCCA input) or as D/A converter analog
output (VDD to GND output).
Pin status is controlled by input data.
See “Data Configuration”. (Default: Input mode, Hi-Z state)
5 to 12
D/A converter reference power pin.
13
MCU interface power supply pin (power supply for I/O expander)
14
I/O expander parallel input/output pins.
(VCCD/GND output: When VCCD ≥ 4.0 V, 0.5 VCCD/0.2 VCCD input,
When VCCD < 4.0 V, 2 V/0.2 VCCD input)
Pin status is controlled by input data
See “Data Configuration.” (Default: Input mode, Hi-Z state)
15 to 18
Shift clock signal input pin.
19
When CS = “L”, SI data is loaded into the shift register at the rising edge of
the shift clock.
Data input pin (serial input pin).
20
Used for 16-bit serial data input.
Data output pin (serial output pin).
21
The first bit (LSB) data of the 16-bit shift register is output simultaneously
with the falling edge of the shift clock.
When /CS output = “H”, this pin goes to high impedance state.
Chip select signal input pin.
22
Input to shift registers is enabled when the/ CS signal falling edges. Shift
register contents can be executed when the /CS signal rising edges.
Analog unit power supply pin (OP amplifier power supply).
23
Common GND pin
24
*1: Be sure that VCCA ≥ VCCD, and that VCCA ≥ VDD.
*2: Do not leave this pin in floating state.
PT8146 V1.1
-4-
February, 2006