PT6315-S_10 Datasheet, PDF (4/21 Pages) Princeton Technology Corp – VFD Driver/Controller IC

VFD Driver/Controller IC
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URL:http://www.princeton.com.tw
PT6315-S
PIN DESCRIPTION
Pin Name
CLK
STB
K1 to K2
VSS
VDD
SG1/KS1 to SG8/KS8
VEE
SG9/GR8 to SG12/GR5
GR4 to GR1
OSC
DOUT
DIN
I/O
Description
Pin No.
I
Clock Input Pin This pin reads serial data at the rising
edge and outputs data at the falling edge.
1
Serial Interface Strobe Pin The data input after the STB
I has fallen is processed as a command. When this pin is
2
“HIGH”, CLK is ignored.
I
Key Data Input Pins The data sent to these pins are
latched at the end of the display cycle.
3, 4
- Logic Ground Pin
5, 25
- Logic Power Supply
6, 24
O
High Voltage Segment Output Pins Also acts as the Key
Source
7 to 14
- Pull Down Level
15
O High Voltage Segment/Grid Output Pins
16 to 19
O High Voltage Grid Output Pins
20 to 23
I
Oscillator Input Pin A resistor is connected to this pin to
determine the oscillation frequency.
26
Data Output Pin (N-Channel, Open Drain) This pin
O outputs serial data at the falling edge of the shift clock
27
(starting from the lower bit).
I
Data Input Pin This pin inputs serial data at the rising
edge of the shift clock (starting from the lower bits).
28
PT6315-S V1.9
-4-
September, 2005