PT6315-S_10 Datasheet, PDF (10/21 Pages) Princeton Technology Corp – VFD Driver/Controller IC

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VFD Driver/Controller IC
PT6315-S
SCANNING AND DISPLAY TIMING
The Key Scanning and display timing diagram is given below. One cycle of key scanning consists of 2
frames. The data of the 8 x 2 matrix is stored in the RAM.
Internal Operating Frequency (fosc) = 224/T
T DISPLAY= 500µs
Key S can Data
SG Output DIG1
G1
DIG2
DIG3
12 8
DIGn
DIG1
9 10 16
G2
G3
Gn
1 Frame = TD ISPLAY X (n + 1)
PT6315-S V1.9
- 10 -
September, 2005