PT6555 Datasheet, PDF (23/28 Pages) Princeton Technology Corp – LCD Driver IC

PT6555
ABSOLUTE MAXIMUM RATINGS
(Unless otherwise specified, Ta=25℃, Vss=0V)
Parameter
Symbol
Conditions
Rating
Unit
Maximum supply voltage
Input voltage
VDD_max VDD
VIN1 CE, CLK, DI
VIN2 OSC, KI1 to KI5, TEST, VDD1, VDD2
-0.3 to +7.0
V
-0.3 to VDD +0.3 V
-0.3 to VDD +0.3 V
Output voltage
VOUT1 DO
-0.3 to VDD +0.3 V
VOUT2 OSC, SG1 to SG41, COM1 to COM4, P1 to P4 -0.3 to VDD +0.3 V
IOUT1 SG1 to SG41
300
µA
Output current
IOUT2 COM1 to COM4
IOUT3 KS1 to KS6
3
mA
1
mA
IOUT4 P1 to P4
Allowable power dissipation Pd max Ta = 85℃
5
mA
200
mW
Operating temperature
Topr -
-40 to +85
℃
Storage temperature
Tstg -
-65 to +150
℃
Note: Only PT6555-LQ has KI1~KI15, SG36~SG41, KS1~KS6, DO, and I/O pins.
ALLOWABLE OPERATING CONDITIONS
(Unless otherwise specified, Ta=25℃, Vss=0V)
Parameter
Symbol
Conditions
Min.
Typ Max. Unit
Supply voltage
VDD VDD
4.5
-
6.0
V
Input voltage
VDD1 VDD1
VDD2 VDD2
-
2/3VDD VDD V
-
1/3VDD VDD V
Input high level voltage
VIH1 CE, CLK, DI
VIH2 KI1 to KI5
2.8
-
0.7VDD
-
VDD V
VDD V
Input low level voltage
VIL CE, CLK, DI, KI1 to KI5
0
-
0.7
V
Recommended external resistance ROSC OSC
-
62
-
KΩ
Recommended external capacitance COSC OSC
-
680
-
pF
Guaranteed oscillation range
Data setup time
Data hold time
fOSC
tds
tdh
OSC
CLK, DI
CLK, DI
25
50
100 KHz
160
-
-
ns
160
-
-
ns
CE wait time
tcp CE, CLK
160
-
-
ns
CE setup time
tcs CE, CLK
160
-
-
ns
CE hold time
tch CE, CLK
160
-
-
ns
High level clock pulse width
toH CLK
160
-
-
ns
Low level clock pulse width
toL CLK
160
-
-
ns
Rise time
-
CE, CLK, DI
-
160
-
ns
Fall time
-
CE, CLK, DI
-
160
-
ns
DO output delay time
tdc DO, RPU=4.7kΩ, CL=10pF
-
-
1.5
µs
DO rise time
tdr DO, RPU=4.7kΩ, CL=10pF
-
-
1.5
µs
V1.1
23
August, 2009