PT8401 Datasheet, PDF (16/28 Pages) Princeton Technology Corp – MP3 Audio Decoder

Princeton Technology Corp.
MP3 Audio Decoder
Tel : [phone]
Fax: [phone]
URL: http://www.princeton.com.tw
PT8401
0x46
0x47
Set_SAO
Set_SAI2
Bit 5:4 00 : ACQO is generated from the Internal Clock.
01 : ACQO is generated from the External Clock.
10 : MCLKO is generated from the External Clock.
Second Serial Input Port Mode Setting
Bit 0
0 : ALRQ Signal. Left is "Low".
1 : ALRQ Signal. Left is "High".
Bit 1
0 : Relative Timing No Delay to ALRQ.
1 : Relative Timing One Delay to ALRQ.
0x59
0x5a
0x5e
ADPCM_FS_SE ADPCM Decoding Mode Sampling Frequency Selection.
L
0 : 11.025kHz.
1 : 12kHz.
2 : 8kHz
Soft_Reset
Set to 1 to software reset, but all the command registers keep the
setting values.
Pwr_Dwn_Reg Power Down Control Register.
0x0 R/W
0x0 R/W
0x0 R/W
0x0 W
0x0 W
0x63 Fward_Num
Fast Foward Mode, number of frame to be play
0x6 W
0x64 Skip_Num
Fast Foward Mode, number of frame to be skip
0x6 W
PLL SETTING COMMAND
Address Register Name
0x48 MclkSel
0x4b PllSet
Description
Master Oversampling Output Clock Selection.
“0” : 256fs.
“1” : 384fs.
PLL Control Parameter Setting.
0x4c PllFraction
15-bit PLL Fraction Parameter Setting.
Default R/W
0x0
R/W
0x3b28 R/W
0x7e5e R/W
PT8401 v 1.3
Page 16
Updated March 2002