PT6314 Datasheet, PDF (14/49 Pages) Texas Instruments – 3 Amp Adjustable Positive Step-down Integrated Switching Regulators

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Dot Character VFD Controller/Driver IC
BUSY FLAG (READ BF FLAG)
The Busy Flag Data (DB7) always outputs “0”.
PT6314
ADDRESS COUNTER (AC)
The Address Counter (AC) designates the addresses of the DDRAM and CGRAM. When an address
of instruction is written into the Instruction Register, the address information is sent from the Instruction
Register (IR) to the Address Counter. The selection of either the DRAM or CGRAM is also determined
concurrently by the instruction. After writing into the DDRAM or CGRAM, the Address Counter is
increased by 1. (The Address Counter is decreased by 1 after data is read from the DDRAM or
CGRAM.) The contents of the Address Counter are then outputted to the DB0~DB6 when RS=”0” and
R/W=”1”. Please refer to the table below.
Common M68
RS
R/W
0
0
0
1
1
0
1
1
I80
/RD /WR
1
0
0
1
1
0
0
1
Register Selection
Write IR Data as internal operation (i.e. display clear)
Read data to busy flag (DB7) and Address Counter
(DB6 to DB0)
Write DR Data (DR→DDRAM/CGRAM)
Read DR Data (DDRAM/CGRAM→DR)
PT6314 V1.3
- 14 -
March, 2006