PT6315 Datasheet, PDF (13/26 Pages) Princeton Technology Corp – VFD Driver/Controller IC

VFD Driver/Controller IC
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PT6315
SCANNING AND DISPLAY TIMING
The Key Scanning and display timing diagram is given below. One cycle of key scanning consists of 2 frames.
The data of the 16 x 2 matrix is stored in the RAM.
Internal Operating Frequency (fosc) = 224/T
TDISPLAY=500us
T
SGn
G1
G2
G3
Key Scan Data
12
8
9 10
16
Gn
1 Frame=TDISPLAY x (n +1)
Figure 12: PT6315 Scanning & Display Timing Diagram
Note: T is the width of Segment only
PT6315 v2.0
Page 13
Sep. 2002