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PSM03S93E5-A Datasheet, PDF (5/11 Pages) Mitsubishi Electric Semiconductor – Dual-In-Line Package Intelligent Power Module
< Dual-In-Line Package Intelligent Power Module >
PSM03S93E5-A
TRANSFER MOLDING TYPE
INSULATED TYPE
Fig. 3 Timing Charts of The DIPIPM Protective Functions
[A] Short-Circuit Protection (N-side only with the external shunt resistor and RC filter)
a1. Normal operation: MOSFET ON and outputs current.
a2. Short circuit current detection (SC trigger)
(It is recommended to set RC time constant 1.5~2.0μs so that MOSFET shut down within 2.0μs when SC.)
a3. All N-side MOSFET's gates are hard interrupted.
a4. All N-side MOSFETs turn OFF.
a5. FO outputs for tFo=minimum 20μs.
a6. Input = “L”: MOSFET OFF
a7. Fo finishes output, but MOSFETs don't turn on until inputting next ON signal (LH).
(MOSFET of each phase can return to normal state by inputting ON signal to each phase.)
a8. Normal operation: MOSFET ON and outputs current.
Lower-side control
input
Protection circuit state
Internal gate
Output current ID
Sense voltage of
the shunt resistor
Error output Fo
a6
SET
a3
RESET
a4
SC trip current level
a1
a2 SC reference voltage
a8
a7
Delay by RC filtering
a5
[B] Under-Voltage Protection (N-side, UVD)
b1. Control supply voltage V D exceeds under voltage reset level (UVDr), but MOSFET turns ON by next ON signal (LH).
(MOSFET of each phase can return to normal state by inputting ON signal to each phase.)
b2. Normal operation: MOSFET ON and outputs current.
b3. VD level drops to under voltage trip level. (UVDt).
b4. All N-side MOSFETs turn OFF in spite of control input condition.
b5. Fo outputs for tFo=minimum 20μs, but output is extended during VD keeps below UVDr.
b6. VD level reaches UVDr.
b7. Normal operation: MOSFET ON and outputs current.
Control input
Protection circuit state
RESET
SET
Control supply voltage VD
UVDr
b1
UVDt
b3
Output current ID
b2
b4
RESET
b6
b7
Error output Fo
b5
Publication Date : October 2013
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