FNP1500_10 Datasheet, PDF (7/17 Pages) Power-One – Front-Ends & FNR-3 Power Shelves Data Sheet

FNP1500/1800 Front-Ends
& FNR-3 Power Shelf Data Sheet
Output Connector Pinning and Signal Specification
Output Connector
Description
Overtemperature /
Fan Fail
AC Fail /
Power down warning
Pin
Location
U1
U2
Type
OC-output, protected by 16 V Zener diode and a 10 Ω
resistor in series, referenced to logic GND
OC-output, protected by 16 V Zener diode and a 10 Ω
resistor in series, referenced to logic GND
Power Supply Present
U3
Resistor (1 kΩ) connected to logic GND
DC Fail /
Output voltage fault
Internal ground
ADDR0, I²C address
bus
ADDR1, I²C address
bus
ADDR2, I²C address
bus
ADDR3, I²C address
bus
ADDR4, I²C address
bus
DATA, I²C data line
CLOCK, I²C clock line
V_o2 + output
V_o2 – output
Logic ground
Output inhibit
V sense +
V sense -
12V models
Output margin
48V models
12V models
Synch. startup
48V models
V_o1 + output
12V models
V_o1 – output
12V models
V_o1 + output
48V models
V_o1 – output
48V models
U4
OC-output, protected by 16 V Zener diode and a 10 Ω
resistor in series, referenced to logic GND
Internal ground (V_o1– line before the output filter).
U5
Do not connect the internal grounds in
systems with several units.
T1
DIP switch or wire to internal ground,
Internally pull up to 5V (10 kΩ).
T2
DIP switch or wire to internal ground,
Internally pull up to 5V (10 kΩ).
T3
DIP switch or wire to internal ground,
Internally pull up to 5V (10 kΩ).
T4
DIP switch or wire to internal ground,
Internally pull up to 5V (10 kΩ).
T5
DIP switch or wire to internal ground,
Internally pull up to 5V (10 kΩ).
S1
I²C compatible signal
referenced to logic GND
S2
I²C compatible signal
referenced to logic GND
S3
Auxiliary power pin, insulated from main output
S4
Auxiliary ground pin, insulated from main output
Internally connected over 10 Ω to Auxiliary GND. Wire
S5
separately form Auxiliary - and main output GND to
minimize noise on signals and I²C.
Leave open if not used.
R1
PS active when pulled low (DC-DC stage off when left
open) Referenced to logic GND
R2
Open or connected to V_o1+ at the load
(Internally connected to V_o1+ over 100 Ω)
R3
Open or connected to V_o1- at the load
(Internally connected to V_o1- over 100 Ω)
Open or connected over resistor to internal ground.
R4
Do not connect the margin pins in
systems with several units.
Open or connected to internal ground
R4
(+8 % V_o1) or V _sense+ (-8 % V_o1)
Do not connect the margin pins in
systems with several units.
R5
Open or connected to synch startup circuit,
referenced to V_o1 - at the output connector
R5
Open or connected to synch startup circuit,
referenced to V_o1 - at the output connector
P2, P4, P6, P8,
P10, P12
P1, P3, P5,
P7, P9, P11
Main output + pins
Main output – pins
P2, P4, P6
Main output + pins
P1, P3, P5
Main output – pins
Low level
High level
< 0.4 V @ 20 mA
Pull up
< 0.4 V @ 20 mA
Pull up
Open
Pull up
< 0.4 V @ 20 mA
Pull up
Switch closed
Switch open
Switch closed
Switch open
Switch closed
Switch open
Switch closed
Switch open
Switch closed
Switch open
5 V or 3.3 V logic
5 V or 3.3 V logic
< 0.8 V
> 2.0 V
V max
I max
15 V
20 mA
15 V
20 mA
10 V
10 mA
15 V
20 mA
5V
5V
5V
5V
5V
10 V
3.5 mA
dU < 3 V_pp
30 mA
dU < 3 V_pp
30 mA
3 VDC
60 VDC
12V
3mA
12V
2mA
MCD10074 Rev. 1.2, 15-Apr-10
Page 7 of 17
www.power-one.com