PM4354 Datasheet, PDF (313/463 Pages) PMC-Sierra, Inc – Four Channel Combined E1/T1/J1 Transceiver/Framer

RELEASED
PM4354 COMET-QUAD
DATASHEET
PMC-1990315
ISSUE 6
FOUR CHANNEL COMBINED E1/T1/J1
TRANSCEIVER / FRAMER
Registers 0C5H, 1C5H, 2C5H, 3C5H: RDLC Secondary Address Match
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
SA[7]
SA[6]
SA[5]
SA[4]
SA[3]
SA[2]
SA[1]
SA[0]
Default
1
1
1
1
1
1
1
1
The first byte received after a flag character is compared against the contents of this register. If a
match occurs, the packet data, including the matching first byte, is written into the FIFO. SA[0]
corresponds to the first bit of the serial byte received on the DATA input. The MM bit in the
Configuration Register is used mask off SA[1:0] during the address comparison.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE
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