PM4354 Datasheet, PDF (234/463 Pages) PMC-Sierra, Inc – Four Channel Combined E1/T1/J1 Transceiver/Framer

RELEASED
PM4354 COMET-QUAD
DATASHEET
PMC-1990315
ISSUE 6
FOUR CHANNEL COMBINED E1/T1/J1
TRANSCEIVER / FRAMER
Register 073H, 173H, 273H, 373H: RPSC Channel Indirect Data Buffer
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
D7
D6
D5
D4
D3
D2
D1
D0
Default
0
0
0
0
0
0
0
0
This register contains either the data to be written into the internal RPSC registers when a write
request is initiated or the data read from the internal RPSC registers when a read request has
completed. During normal operation, if data is to be written to the internal registers, the byte to be
written must be written into this Data register before the target register's address and R/WB=0 is
written into the Address/Control register, initiating the access. If data is to be read from the internal
registers, only the target register's address and R/WB=1 is written into the Address/Control
register, initiating the request. After 640 ns, this register will contain the requested data byte.
The internal RPSC registers control the per-channel functions on the Receive PCM data, provide
the per-channel Data Trunk Conditioning Code and provide the per-channel Signaling Trunk
Conditioning Code. The functions are allocated within the registers shown in Table 40:
Table 40
Addr
20H
21H
22H
•
•
37H
38H
39H
- RPSC Indirect Register Map
Register
PCM Data Control byte for Timeslot 0
PCM Data Control byte for Channel 1/Timeslot 1
PCM Data Control byte for Channel 2/Timeslot 2
•
•
PCM Data Control byte for Channel 23/Timeslot 23
PCM Data Control byte for Channel 24/Timeslot 24
PCM Data Control byte for Timeslot 25
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE
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