PM4341AT1XC Datasheet, PDF (242/288 Pages) PMC-Sierra, Inc – SINGLE DSX-1 TRANSCEIVER DEVICE

DATA SHEET
PMC-900602
ISSUE 7
PM4341A T1XC
T1 FRAMER/TRANSCEIVER
by a flag, is sent out on the data link. Meanwhile, the processor must clear the
TDLUDR interrupt by setting the UDR bit in the Status Register to logic 0. The
TDLINT interrupt should also be disabled at this time by setting the INTE bit in
the Configuration Register to logic 0. The data frame can then be restarted as
usual, by setting the INTE bit logic to 1. Transmission of the frame then proceeds
normally.
13.4 Using the Loopback Modes
The T1XC provides four loopback modes to aid in network and system
diagnostics. The network loopbacks (PAYLOAD and LINE) can be initiated at any
time via the µP interface, but are usually initiated once an inband loopback
activate code is detected. The system loopbacks (Diagnostic DIGITAL and
METALLIC) can be initiated at any time by the system via the µP interface to
check the path of system data through the transceiver.
13.4.1 Payload Loopback
When PAYLOAD loopback (PAYLB) is initiated by writing 20H to the Master
Diagnostics Register (0AH), the T1XC is configured to internally connect the
output of the ELST to the PCM input of XBAS. The data is read out of ELST
timed to the transmitter clock, and the transmit frame alignment indication is used
to synchronize the output frame alignment of ELST. Conceptually, the data flow
through T1XC in this loopback condition can be shown as follows:
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 224