PM8611 Datasheet, PDF (162/292 Pages) PMC-Sierra, Inc – SBSLITE™ Telecom Standard Product Data Sheet Preliminary

SBSLITE™ Telecom Standard Product Data Sheet
Preliminary
Register 081h (IADDR = 8h): PPP Generator STS-1 path Configuration
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R/W
R/W
Function
Unused
Unused
Reserved
LINKENA
Unused
Unused
Reserved
LINKENA
Reserved
Reserved
SEQ_PRBSB
Reserved
FORCE_ERR
Unused
INV_PRBS
Reserved
Default
X
X
0
0
X
X
X
X
0
0
0
0
0
0
0
This register contains the definition of the PPP Indirect Data register (Register 081h) when
accessing Indirect Address 8h (IADDR[3:0] is “8h” in register 080h).
For STS-Nc rates, only the first STS-1 has to be configured.
INV_PRBS
Sets the generator to invert the PRBS before inserting it in the payload. When set high, the
PRBS bytes will be inverted, else they will be inserted unmodified.
FORCE_ERR
The Force Error bit is used to force bit errors in the inserted pattern. When a logic one is
written, the MSB of the next byte will be inverted, inducing a single bit error. The register
clears itself when the operation is complete.
SEQ_PRBSB
This bit enables the insertion of a PRBS sequence or a sequential pattern in the payload.
When low, the payload is filled with PRBS bytes, and when high, a sequential pattern is
inserted.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
161
Document ID: PMC-2010883, Issue 2