PM6344-1 Datasheet, PDF (144/256 Pages) PMC-Sierra, Inc – QUADRUPLE E1 FRAMER

STANDARD PRODUCT
PMC-951013
ISSUE 5
PMC-Sierra, Inc.
PM6344 EQUAD
QUADRUPLE E1 FRAMER
TPSC Internal Registers 40-5FH: IDLE Code byte
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
IDLE7
IDLE6
IDLE5
IDLE4
IDLE3
IDLE2
IDLE1
IDLE0
The contents of the IDLE Code byte register are substituted for the timeslot data
on BTPCM when the SUBS bit in the PCM Control Byte is set to a logic 1 and
the DS[0] bit in the PCM Control Byte is set to a logic 0. The IDLE Code is
transmitted from MSB (bit 7) to LSB (bit 0).
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