PM7384 Datasheet, PDF (122/358 Pages) PMC-Sierra, Inc – Frame Engine and Data Link Manager

DATA SHEET
PMC-1990445
ISSUE 5
PM7384 FREEDM-84P672
FRAME ENGINE AND DATA LINK MANAGER 84P672
Register 0x038 : FREEDM-84P672 Master Tributary Loopback #3
Bit
Bit 31
to
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
Function
Unused
Default
XXXXH
R/W SPE2_LBEN[20]
0
R/W SPE2_LBEN[19]
0
R/W SPE2_LBEN[18]
0
R/W SPE2_LBEN[17]
0
R/W SPE2_LBEN[16]
0
R/W SPE2_LBEN[15]
0
R/W SPE2_LBEN[14]
0
R/W SPE2_LBEN[13]
0
R/W SPE2_LBEN[12]
0
R/W SPE2_LBEN[11]
0
R/W SPE2_LBEN[10]
0
R/W
SPE2_LBEN[9]
0
R/W
SPE2_LBEN[8]
0
R/W
SPE2_LBEN[7]
0
R/W
SPE2_LBEN[6]
0
R/W
SPE2_LBEN[5]
0
This register controls line loopback for tributaries #5 to #20 of SPE #2.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
SPE2_LBEN[20:5]:
The SPE #2 loopback enable bits (SPE2_LBEN[20:5]) control line loopback
for tributaries #20 to #5 of SPE #2 of the SBI Interface. When
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 111