PL611-20 Datasheet, PDF (2/7 Pages) PhaseLink Corporation – Programmable Quick Turn Clock

KEY PROGRAMMING PARAMETERS
PL611-20
Programmable Quick Turn Clock^TM
CLK[ 0:2 ]
Output Frequency
Output Drive
Strength
Crystal Load
Programmable
Input/Output (pin #7)
Fout = FIN * M / (R * P) where
M=10 bit
R = 8 bit
P = 5 bit
1. CLK[0:1] = VCO / 2 * P
2. CLK0 = ~ CLK1
2. CLK[2]= FIN or FIN/2
Std: 10mA
(default)
High: 24mA
+/- 200ppm
tuning.
One output pin can be
configured as
1. CLK2 = FIN or FIN/2
2. FSEL - input
3. OE - input
Charge-Pump
Current
4 levels of pump
current setting
PIN DESCRIPTION
Name
XIN/FIN
GND
CLK[0:1]
VDD
DNC
CLK2, OE, FSEL
Pin #
(M)SOP-8 SOT-23
1
3
2
2
3,4
1
5
6
6
-
7
5
Type
Description
I
Crystal or Reference input pin
P
GND connection
O
Programmable Clock Output [note:CLK0=CLK1]
P
VDD connection (2.25~3.63V)
-
Do No Connect
This programmable I/O pin can be configured as CLK2
(FIN or FIN/2) output, or OE input, or Frequency
Selection (FSEL) input pin. This pin has an internal 60KΩ
pull up resistor.
State
OE
FSEL
B
Tristate
0
Select Freq. ‘1’
CLK[0:1]
1 (default)
Normal
mode
Select Freq. ‘2’
XOUT
8
4
O
Crystal output pin
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Rev 07/06/05 Page 2