PL660 Datasheet, PDF (13/15 Pages) PhaseLink Corporation – Analog Frequency Multiplier

Analog Frequency Multiplier
PL660 and PL663 XO Families
PACKAGE PIN DESCRIPTION AND ASSIGNMENT
DNC 1
GNDOSC 2
DNC 3
XIN 4
XOUT 5
OE 6
DNC 7
GNDANA 8
16 L2X
15 VDDOSC
14 VDDANA
OESEL
13 OESEL
VDDANA
VDDOSC
12 VDDBUF
L2X
11 QBAR
10 Q
9 GNDBUF
1
12
3
1
1
1
0
9
8
1
4
1
5
7
PL663-XX
6
1
61
23
5
4
OSCOFFSEL 1
GNDOSC 2
GNDANA
DNC 3
DNC
OE
XOUT
XIN 4
XOUT 5
OE 6
L4X 7
VDDOSC 8
16 L2X
15 VDDOSC
VDDANA
14 OESEL
OESEL
13 VDDANA _VDDOSC
12 VDDBUF
L2X
11 QBAR
10 Q
9 GNDBUF
1
12
3
1
1
1
0
9
8
1
4
1
5
PL660-XX
7
6
1
61
23
5
4
VDDOSC
L4X
OE
XOUT
2x AFM Package Pin Out
4x AFM Package Pin Out
PIN ASSIGNMENTS
Name Pin # Type Product
Description
DNC
1
I
OSCOFFSEL
2X
Do Not Connect.
4X
Set to “0” (GND) to turn off the oscillator when outputs are disabled (OE). Default (no connect) is
OSC always on.
GNDOSC
2
P
2X & 4X GND connection for oscillator.
DNC
3
I
2X & 4X Do Not Connect.
XIN
4
I
2X & 4X Input from crystal oscillator circuitry.
XOUT
5
O
2X & 4X Output from crystal oscillator circuitry.
OE
6
I
2X & 4X Output Enable input. See “OE LOGIC SELECTION TABLE”.
DNC
2X
Do Not Connect.
External inductor connection. The inductor is recommended to be a high Q small size 0402 or
L4X
7
I
4X
0603 SMD component, and must be placed between L4X and adjacent VDDOSC. Place inductor
as close to the IC as possible to minimize parasitic effects and to maintain inductor Q. This
inductor is used with 4x AFMs.
GNDANA
8
P
VDDOSC
2X
GND connection.
4X
VDD connection for oscillator circuitry. VDDOSC should be separately decoupled from other
VDDs whenever possible.
GNDBUF
9
P
2X & 4X GND connection.
Q
10
O
2X & 4X PECL/LVDS/CMOS output.
QBAR
11
O
2X & 4X Complementary PECL/LVDS output or in-phase CMOS.
VDDBUF
12
P
2X & 4X
VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other
VDDs whenever possible.
OESEL
13
I
14
2X
Selector input to choose the OE control logic (see “OE SELECTION TABLE”). If no connection
4X
is applied, value will be set to default through internal pull-down resistor.
14
VDDANA
P
13
2X
VDD connection for analog circuitry.VDDANA should be separately decoupled from other VDDs
4X
whenever possible.
VDDOSC
15
P
2X & 4X
VDD connection for oscillator. VDD should be separately decoupled from other VDDs whenever
possible.
External inductor connection. The inductor is recommended to be a high Q small size 0402 or
L2X
16
I
2X & 4X 0603 SMD component, and must be placed between L2X and adjacent VDDOSC. Place inductor
as close to the IC as possible to minimize parasitic effects and to maintain inductor Q.
Note: 663-xx devices are 2x multipliers, and 660-xx devices are 4x multipliers.
47745 Fremont Blvd., Fremont, California 94538 TEL [phone], FAX [phone] www.phaselink.com Rev. 3/20/07 Page 13