PL560-XX Datasheet, PDF (13/15 Pages) PhaseLink Corporation – Analog Frequency Multiplier

Analog Frequency Multiplier
PL560-xx VCXO Family
PACKAGE PIN DESCRIPTION AND ASSIGNMENT
OSCOFFSEL 1
GNDOSC 2
VCON 3
XIN 4
XOUT 5
OE 6
DNC 7
GNDANA 8
16 L2X
15 VDDOSC
14 OESEL
13 VDDANA
12 VDDBUF
11 QBAR
10 Q
9 GNDBUF
VDDANA
OESEL
VDDOSC
L2X
12
13
11 10
9
8
14 _P560-4X 7
15
6
16
5
123 4
OSCOFFSEL 1
GNDOSC 2
GNDANA
DNC
OE
XOUT
VCON 3
XIN 4
XOUT 5
OE 6
L4X 7
VDDOSC 8
16 L2X
15 VDDOSC
VDDANA
14 OESEL
OESEL
13 VDDANA VDDOSC
12 VDDBUF
L2X
11 QBAR
10 Q
9 GNDBUF
12
13
11 10
9
8
14 _P560-0X 7
15
6
16
5
123 4
VDDOSC
L4X
OE
XOUT
2X AFM Package Pin Out
4X AFM Package Pin Out
PIN ASSIGNMENTS
Name
OSCOFFSEL
GNDOSC
VCON
XIN
XOUT
OE
DNC
L4X
GNDANA
VDDOSC
GNDBUF
Q
QBAR
VDDBUF
VDDANA
OESEL
VDDOSC
L2X
Pin# Type Product
Description
1
I
2X & 4X
Set to “0” (GND) to choose to turn off the oscillator when outputs are disabled (OE). Default (no
connect) is OSC always on.
2
P
2X & 4X GND connection for oscillator circuitry.
3
I
2X & 4X
Control Voltage input. Use this pin to change the output frequency by varying the applied Control
Voltage.
4
I
2X & 4X Input from crystal oscillator circuitry.
5
O
2X & 4X Output from crystal oscillator circuitry.
6
I
2X & 4X Output Enable input (see "OE LOGIC SELECTION TABLE").
7
I
2X
Do Not Connect.
External inductor connection. The inductor is recommended to be a high Q small
4X
size 0402 or 0603 SMD component, and must be placed between L4X and adjacent
VDDOSC. Place inductor as close to the IC as possible to minimize parasitic effects
and to maintain inductor Q. This inductor is used with 4X AFMs.
8
P
2X
GND connection.
4X
VDD connection for oscillator circuitry. VDDOSC should be separately decoupled from other
VDDs whenever possible.
9
P
2X & 4X GND connection for output buffer circuitry.
10
O
2X & 4X PECL/LVDS or CMOS output.
11
O
2X & 4X Complementary PECL/LVDS output or in phase CMOS.
12
P
2X & 4X
VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other
VDDs whenever possible.
13
P
2X & 4X
VDD connection for analog circuitry. VDDANA should be separately decoupled from other VDDs
whenever possible.
14
I
2X & 4X Selector input to choose the OE control logic (see “OE SELECTION TABLE”). Internal pull-down.
15
P
2X & 4X
VDD connection for oscillator circuitry. VDDOSC should be separately decoupled from other
VDDs whenever possible.
External inductor connection. The inductor is recommended to be a high Q small
16
I
2X & 4X
size 0402 or 0603 SMD component, and must be placed between L2X and adjacent
VDDOSC. Place inductor as close to the IC as possible to minimize parasitic effects
and to maintain inductor Q.
47745 Fremont Blvd., Fremont, CA 94538 TEL [phone], FAX [phone] www.phaselink.com Rev.:02-09-07 Page 13