PL580-68 Datasheet, PDF (1/10 Pages) PhaseLink Corporation – 320-640MHz Low Phase Noise VCXO

(Preliminary) PL580-68/69
320-640MHz Low Phase Noise VCXO
FEATURES
• Less than 0.4ps RMS (12KHz-20MHz) phase
jitter for all frequencies.
• Low phase noise output (@ 1MHz frequency
offset
∗ -140dBc/Hz for 320.0MHz,
∗ -131dBC/Hz for 622.08MHz
• 20MHz-40MHz crystal input.
• 320MHz-640MHz output.
• Available in PECL, or LVDS outputs.
• No external varicap required.
• Output Enable selector.
• Wide pull range (+/-200ppm).
• 3.3V operation.
• Available in 3x3 QFN or 16-pin TSSOP
packages.
PACKAGE PIN ASSIGNMENT
VDDANA 1
XIN 2
XOUT 3
SEL2^ 4
OE_CTRL 5
VCON 6
GNDANA 7
LP 8
16 SEL0^
15 _SEL1^
14 _GNDBUF
13 _QBAR
12 _VDDBUF
11 _Q
10 GNDBUF
9 LM
DESCRIPTION
The PL580-6X is a monolithic low jitter and low
phase noise VCXO, capable of 0.4ps RMS phase
jitter and PECL or LVDS outputs, covering a wide
frequency output range up to 640MHz. It allows the
control of the output frequency with an input voltage
(VCON), using a low cost crystal.
The PL580-6X is designed to address the
demanding requirements of high performance
applications such as SONET, GPS, Video, etc.
XOUT
DNC
OE_CTRL
VCON
12 11 10 9
13
8
14
7
PL580-6X
15
6
16
5
1234
GNDBUF
QBAR
VDDBUF
Q
Note1: ^ Denotes internal pull up resistor.
BLOCK DIAGRAM
VCON
XIN
XOUT
VARICAP
XTAL
OSC
VCO
Divider
Phase
Detector
Charge
Pump
L o+o p
Filter
VCO
(F_XiNx16)
Output
D iv id e r
Performance Tuner
QBAR
Q
OE
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 11/28/05 Page 1