ADNS-3090 Datasheet, PDF (11/38 Pages) Pixart Imaging Inc. – High-Performance Optical Mouse Sensor

PixArt Imaging Inc.
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AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V_DD3=3.3V, fclk=24MHz.
Parameter
VDD to RESET
Data delay
after RESET
Input delay
after reset
Power Down
Wake from NPD
Symbol
t_OP
t_PU-RESET
T_IN-RST
t_PD
t_PUPD
Min. Typical
Data delay
after NPD
t_COMPUTE
RESET pulse width t_PW-RESET 10
MISO rise time
t_r-MISO
40
MISO fall time
t_f-MISO
40
MISO delay
afterSCLK
t_DLY-MISO
MISO hold time
MOSI hold time
t_hold-MISO 250
t_hold-MOSI 200
MOSI setup time
SPI time between
write commands
t_setup-MOSI 120
t_SWW
50
SPI time between
t_SWR
50
write and read
commands
SPI time between
t_SRW
250
read and subsequent t_SRR
commands
SPI read
address-data
delay
t_SRAD
50
SPI motion read
address-data
delay
t_SRAD-MOT 75
NCS to SCLK active t_NCS-SCLK 120
SCLK to NCS inactive t_SCLK-NCS 120
NCS to MISO high-Z t_NCS-MISO
SROM download and t_LOAD
10
frame capture
byte-to-byte delay
Max. Units Notes
250 s
From VDD = 3.0V to RESET sampled
35
ms
From RESET falling edge to valid motion data at
2000 fps and shutter bound 8290.
500 s
From RESET falling edge to inputs active (NPD,
MOSI, NCS, SCLK)
2.1 ms From NPD falling edge to initiate the power down
cycle at 500fps (tpd = 1 frame period + 100ms )
75
ms
From NPD rising edge to valid motion data at
2000 fps and shutter bound 8290. Max assumes
surface change while NPD is low.
3.1 ms From NPD rising edge to all registers contain data
from new images at 2000fps (see Figure 10) .
s
200 ns
200 ns
120 ns
C_L = 50pF
C_L = 50pF
From SCLK falling edge to MISO data valid, no load
conditions
ns
Data held until next falling SCLK edge
ns
Amount of time data is valid after SCLK rising
edge
ns
From data valid to SCLK rising edge
s
From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second data byte.
s
From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second address
byte.
ns
From rising SCLK for last bit of the first data byte,
to falling SCLK for first bit of the second address
byte.
s
From rising SCLK for last bit of the address byte,
to falling SCLK for first bit of data being read. All
registers except Motion & Motion_Burst
s
From rising SCLK for last bit of the address byte, to
falling SCLK for first bit of data being read. Applies
to 0x02 Motion, and 0x50 Motion_Burst, registers
ns
From NCS falling edge to first SCLK rising edge
ns
From last SCLK falling edge to NCS rising edge, for
valid MISO data transfer
250 ns
From NCS rising edge to MISO high-Z state
s
(see Figure 23 and 24)
NCS to burst mode t_BEXIT
4
exit
s
Time NCS must be held high to exit burst mode
Transient Supply
I_DDT
Current
85
mA Max supply current during a V_DD3 ramp from 0 to
3.6V
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PixArt Imaging Inc.
E-mail: [e-mail]