TDA8763 Datasheet, PDF (9/24 Pages) NXP Semiconductors – 10-bit high-speed low-power ADC with internal reference regulator

Philips Semiconductors
10-bit high-speed low-power ADC with
internal reference regulator
Product specification
TDA8763
SYMBOL
PARAMETER
CONDITIONS
MIN.
BANDWIDTH (f_clk = 40 MHz)
B
analog bandwidth
t_stLH
analog input settling time
LOW-to-HIGH
t_stHL
analog input settling time
HIGH-to-LOW
full-scale sine wave;
−
note 5
75% full-scale sine wave; −
note 5
small signal at mid-scale; −
V_I = ±10 LSB at
code 512; note 5
full-scale square wave; −
see Fig.6; note 6
full-scale square wave; −
see Fig.6; note 6
HARMONICS (f_clk = 40 MHZ); see Figs 7 and 8
H_fund(FS) fundamental harmonics
f_i = 4.43 MHz
−
(full-scale)
H_all(FS)
harmonics (full-scale);
all components
f_i = 4.43 MHz
second harmonics
−
third harmonics
−
THD
total harmonic distortion
f_i = 4.43 MHz
−
SIGNAL-TO-NOISE RATIO; see Figs 7 and 8; note 7
SNR_FS signal-to-noise ratio (full-scale) without harmonics;
55
f_clk = 40 MHz;
f_i = 4.43 MHz
EFFECTIVE BITS; see Figs 7 and 8; note 7
EB
effective bits
TDA8763M/3;
f_clk = 30 MHz
f_i = 4.43 MHz
−
f_i = 7.5 MHz
−
TDA8763M/4;
f_clk = 40 MHz
f_i = 4.43 MHz
−
f_i = 7.5 MHz
−
f_i = 10 MHz
−
f_i = 15 MHz
−
TDA8763M/5;
f_clk = 50 MHz
f_i = 4.43 MHz
−
f_i = 7.5 MHz
−
f_i = 10 MHz
−
f_i = 15 MHz
−
TYP.
MAX.
15
−
20
−
350 −
1.5
3.0
1.5
3.0
−
0
−70 −63
−72 −63
−61 −
58
−
9.4
−
9.1
−
9.3
−
9.0
−
8.9
−
8.1
−
9.3
−
8.9
−
8.8
−
8.0
−
UNIT
MHz
MHz
MHz
ns
ns
dB
dB
dB
dB
dB
bits
bits
bits
bits
bits
bits
bits
bits
bits
bits
1999 Jan 06
9