TDA8763 Datasheet, PDF (8/24 Pages) NXP Semiconductors – 10-bit high-speed low-power ADC with internal reference regulator

Philips Semiconductors
10-bit high-speed low-power ADC with
internal reference regulator
Product specification
TDA8763
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
Reference voltages for the resistor ladder using the internal voltage regulator; see Table 1
V_RB
V_RT
V_diff
I_ref
R_lad
TC_Rlad
V_offset(B)
V_offset(T)
V_i(p-p)
reference voltage BOTTOM
reference voltage TOP
differential reference voltage
V_RT − V_RB
reference current
resistor ladder
temperature coefficient of the
resistor ladder
offset voltage BOTTOM
offset voltage TOP
analog input voltage
(peak-to-peak value)
note 2
note 2
note 3
1.1
1.3
1.5
3.4
3.6
3.8
2.25
2.3
2.35
−
9.39 −
−
245 −
−
1860 −
−
456 −
−
175 −
−
175 −
1.90
1.95 2.00
Outputs
DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND)
V_OL
LOW-level output voltage
I_OL = 1 mA
V_OH
HIGH-level output voltage
I_OH = −1 mA
I_OZ
output current in 3-state mode 0.5 V < V_o < V_CCO
Switching characteristics
0
−
V_CCO − 0.5 −
−20
−
0.5
V_CCO
+20
CLOCK INPUT CLK; see Fig.4; note 1
f_clk(max)
maximum clock frequency
TDA8763M/3
TDA8763M/4
TDA8763M/5
t_CPH
clock pulse width HIGH
t_CPL
clock pulse width LOW
Analog signal processing
30
40
50
full effective bandwidth 8.5
full effective bandwidth 5.5
−
−
−
−
−
−
−
−
−
−
LINEARITY
INL
DNL
E_offset
E_G
integral non-linearity
f_clk = 40 MHz; ramp input −
differential non-linearity
f_clk = 40 MHz; ramp input −
offset error
middle code
−
gain error (from device to device) note 4
−
using internal reference voltage
±0.8 ±2.0
±0.5 ±0.9
±1
−
±3
−
UNIT
V
V
V
mA
Ω
ppm
mΩ/K
mV
mV
V
V
V
µA
MHz
MHz
MHz
ns
ns
LSB
LSB
LSB
%
1999 Jan 06
8