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TDA8706A Datasheet, PDF (9/20 Pages) NXP Semiconductors – 6-bit analog-to-digital converter with multiplexer and clamp
Philips Semiconductors
6-bit analog-to-digital converter
with multiplexer and clamp
Product specification
TDA8706A
Table 1 Output coding and input voltage (typical values)
STEP
Vi(p-p) (V)
BINARY OUTPUT BITS
VDDA = VDDD = 3 V VDDA = VDDD = 5 V D5
D4
D3
D2
D1
D0
Underflow
<VDDA − 1.1
<VDDA − 1.06
0
0
0
0
0
0
0
VDDA − 1.1
VDDA − 1.06
0
0
0
0
0
0
1
.
.
0
0
0
0
0
1
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
62
.
.
1
1
1
1
1
0
63
VDDA − 0.4
VDDA − 0.4
1
1
1
1
1
1
Overflow
>VDDA − 0.4
>VDDA − 0.4
1
1
1
1
1
1
Table 2 Clamping input level (VCLPR, VCLPG and VCLPB)
VCLPR, VCLPG AND VCLPB
Open-circuit(1)
Vcode −9 to Vcode 20
Note
1. Use capacitor ≥10 pF to VSSA.
CLAMPING LEVEL
code 0
code −9 to code 20
Table 3 Clamp and inputs RED, GREEN and BLUE; VDDA = VDDD = VDDO = 3 V
SR or SG or SB
0
1
CLAMP
1
VCLPR, VCLPG or VCLPB
open
VCLP
open
VCLP
Vi RED or GREEN or BLUE
VDDA − 1.1 V
VCLP
VDDA − 1.1 V
VCLP
Note
1. Where X = don’t care.
DIGITAL OUTPUTS
X(1)
0
code (VCLP)
Table 4 Clamping characteristic related to TV signals
PARAMETER
Clamping time per line (signal active)
Input signals clamped to correct level
MIN.
2.2
−
TYP.
3.0
3
MAX.
−
10
UNIT
µs
lines
1996 Jul 30
9