74HC165 Datasheet, PDF (9/10 Pages) NXP Semiconductors – 8-bit parallel-in/serial-out shift register

Philips Semiconductors
8-bit parallel-in/serial-out shift register
AC WAVEFORMS
Product specification
74HC/HCT165
The changing to output assumes internal Q₆
opposite state from Q₇.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.6 Waveforms showing the clock (CP) to output (Q₇ or Q₇) propagation delays, the clock pulse width, the
output transition times and the maximum clock frequency.
The changing to output assumes internal Q₆
opposite state from Q₇.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing the parallel load (PL) pulse width, the parallel load to output (Q₇ or Q₇) propagation
delays, the parallel load to clock (CP) and clock enable (CE) removal time.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing the data input (D_n) to output (Q₇ or Q₇) propagation delays when PL is LOW.
December 1990
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