ISP1161A1 Datasheet, PDF (88/136 Pages) NXP Semiconductors – Universal Serial Bus single-chip host and device controller

Philips Semiconductors
ISP1161A1
USB single-chip host and device controller
Table 72: DACK-only mode: pin functions
Symbol Description
I/O
DREQ2 DC’s DMA request
O
DACK2 DC’s DMA
I
acknowledge
EOT
End-Of-Transfer
I
RD
read strobe
I
WR
write strobe
I
Function
ISP1161A1 DC requests a DMA transfer
DMA controller confirms the transfer;
also functions as data strobe
DMA controller terminates the transfer
not used
not used
In the DACK-only mode, the ISP1161A1’s DC uses the DACK2 signal as a data
strobe. Input signals RD and WR are ignored. This mode is used in CPU systems that
have a single address space for memory and I/O access. Such systems have no
separate MEMW and MEMR signals: the RD and WR signals are also used as
memory data strobes.
ISP1161A1
DEVICE
CONTROLLER
DREQ2
DACK2
D0 to D15
RAM
DMA
CONTROLLER
DREQ
DACK
RD
WR
HRQ
HLDA
CPU
HRQ
HLDA
004aaa186
Fig 41. ISP1161A1’s device controller in DACK-only DMA mode.
12.4 End-Of-Transfer conditions
12.4.1 Bulk endpoints
A DMA transfer to/from a bulk endpoint can be terminated by any of the following
conditions (bit names refer to the DcDMAConfiguration register, see Table 86):
• An external End-Of-Transfer signal occurs on input EOT
• The DMA transfer completes as programmed in the DcDMACounter register
(CNTREN = 1)
• A short packet is received on an enabled OUT endpoint (SHORTP = 1)
• DMA operation is disabled by clearing bit DMAEN.
External EOT: When reading from an OUT endpoint, an external EOT will stop the
DMA operation and clear any remaining data in the current FIFO. For a double-
buffered endpoint the other (inactive) buffer is not affected.
When writing to an IN endpoint, an EOT will stop the DMA operation and the data
packet in the FIFO (even if it is smaller than the maximum packet size) will be sent to
the USB host at the next IN token.
9397 750 13961
Product data
Rev. 03 — 23 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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