TDA8703 Datasheet, PDF (8/18 Pages) NXP Semiconductors – 8-bit high-speed analog-to-digital converter

Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDA8703
SYMBOL
PARAMETER
Reference resistance
R_ref
reference resistance
Outputs
DIGITAL OUTPUTS (D7 - D0) (REFERENCED TO DGND)
V_OL
LOW level output voltage
V_OH
HIGH level output voltage
I_OZ
output current in 3-state mode
Switching characteristics (note 2; see Fig.3)
f_CLK/f_CLK
maximum clock frequency
Analog signal processing (f_CLK = 40 MHz)
B
−3 dB bandwidth
G_d
φ_d
f₁
f_all
SVRR1
differential gain
differential phase
fundamental harmonics (full-scale)
harmonics (full-scale), all components
supply voltage ripple rejection
SVRR2
supply voltage ripple rejection
Transfer function
ILE
DC integral linearity error
DLE
DC differential linearity error
AILE
AC integral linearity error
EB
effective bits
Timing (note 7; see Figs 3 to 6; f_CLK = 40 MHz)
t_dS
sampling delay
t_HD
output hold time
t_dLH
output delay time
t_dHL
output delay time
t_dZH
3-state output delay times
t_dZL
3-state output delay times
t_dHZ
3-state output delay times
t_dLZ
3-state output delay times
CONDITIONS
V_RT to V_RB
MIN. TYP. MAX. UNIT
−
220 −
Ω
I_O = 1 mA
I_O = −0.4 mA
0.4 V < V_O < V_CCD
0
−
2.7 −
−20 −
40 −
0.4 V
V_CCD V
+20 µA
−
MHz
note 3
note 4
note 4
f_i = 4.43 MHz
f_i = 4.43 MHz
note 5
note 5
−
19.5 −
MHz
−
0.6 −
%
−
0.8 −
deg
−
−
0
dB
−
−55 −
dB
−
−28 −25 dB
−
1
2.5 %/V
note 6
f_i = 4.43 MHz
−
−
±1 LSB
−
−
±1/2 LSB
−
−
±2 LSB
−
7.1 −
bits
−
6
LOW-to-HIGH transition −
HIGH-to-LOW transition −
enable-to-HIGH
−
enable-to-LOW
−
disable-to-HIGH
−
disable-to-LOW
−
−
2
ns
−
−
ns
8
10 ns
16 20 ns
19 25 ns
16 20 ns
14 20 ns
9
12 ns
1996 Aug 26
8