TDA8703 Datasheet, PDF (14/18 Pages) NXP Semiconductors – 8-bit high-speed analog-to-digital converter

Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDA8703
APPLICATION INFORMATION
Additional application information will be supplied upon request (please quote number FTV/8901).
handbook, full pagewidth
D1 1
D2
24
D0 2
D3
23
AGND 3
V _{RB 4}
22 ^CE
21 ^TC
47 pF
4.7 µF
4.7 µF 22 nF
DEC 5
n.c. 6
V _{CCA 7}
VI 8
VRT ₉
n.c. 10
DGND
20
TDA8703
TDA8703T
19 ^VCCO
18 ^VCCD
CLK
17
16 ^CLK
22 nF
5V
22 Ω ⁽¹⁾
22 nF
100 pF
15 ^D4
DGND
AGND
O / UF 11
D7 12
14 ^D5
D6
13
MGA014 - 1
CLK should be decoupled to the DGND with a 100 nF capacitor, if a TTL signal is used on CLK (see Chapter “Characteristics”, note 1).
CLK and CLK can be used in a differential mode (see Chapter “Characteristics”, note 1).
V_RB and V_RT are decoupling pins for the internal reference ladder; do not draw current from these pins in order to achieve good linearity.
If it is required to use the TDA8703 in a parallel system configuration, the references (V_RB and V_RT) of each TDA8703 can be connected together.
Code 0 will be identical and code 255 will remain in the 1 LSB variation for each TDA8703.
Analog and digital supplies should be separated and decoupled.
Pins 6 and 10 should be connected to AGND in order to prevent noise influence.
(1) It is recommended to decouple V_CCO through a 22 Ω resistor especially when the output data of the TDA8703 interfaces with a capacitive CMOS
load device.
Fig.13 Application diagram.
1996 Aug 26
14