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TDA8041H Datasheet, PDF (8/16 Pages) NXP Semiconductors – Quadrature demodulator controller
Philips Semiconductors
Quadrature demodulator controller
Preliminary specification
TDA8041H
CHARACTERISTICS
VDD = 4.75 to 5.25 V; Rsym = 30 × 106 symbols/s; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX.
UNIT
Digital outputs (pins 26 to 28 and 31 to 33)
VOL
LOW level output voltage
VOH
HIGH level output voltage see Fig.6
td
delay time
see Fig.6
th
hold time
Digital inputs
VIL
LOW level input voltage
VIH
HIGH level input voltage
CI
input capacitance
Clock output (pins 22 and 25); see Fig.5
VOL
LOW level output voltage
VOH
HIGH level output voltage
Tcy
cycle time
tW
pulse width
duty cycle 40/60
tr
rise time
CL = 30 pF
tf
fall time
CL = 30 pF
Clock input (pin 23)
Rsource
fs
source resistance
sampling frequency
Analog inputs (pins 18 and 19)
Rsym
Vref(pos)
Vref(mid)
Vref(neg)
IL
Vi(I,Q)
VI,Q(op)
RI
CI
Ibias
symbol rate
positive reference voltage IO = 0
middle reference voltage IO = 0
negative reference voltage IO = 0
load current at pin 8
note 1
I and Q input voltage
I and Q operating voltage
input resistance
input capacitance
input bias current
RL = 100 kΩ
DAC outputs (pins 10, 12, 15 and 21)
Io(av)
DIo
average output current
matching of positive and
negative output currents
VDAC = Vref(mid); note 2
VDAC = Vref(mid); note 2
Io
zero output current
0
0.9VDD
th
8
0
0.7VDD
−
0
0.9VDD
33
13.2
−
−
−
−
−
−
−
−
−5
0
0.28VDD
50
−
−
−
−7
−25
−
0.1VDD V
−
VDD
V
−
22
ns
−
td
ns
−
0.3VDD V
−
VDD
V
−
10
pF
−
0.1VDD V
−
VDD
V
−
−
ns
−
−
ns
−
6
ns
−
6
ns
−
50
Ω
−
60
MHz
−
0.48VDD
0.38VDD
0.28VDD
−
−
−
−
−
−37
30 × 106
−
−
−
+5
VDD
0.48VDD
−
20
−
symbols/s
V
V
V
mA
V
V
kΩ
pF
mA
100
−
mA
−
+7
%
−
+25
nA
November 1994
8