TDA8041H Datasheet, PDF (6/16 Pages) NXP Semiconductors – Quadrature demodulator controller

Philips Semiconductors
Quadrature demodulator controller
Preliminary specification
TDA8041H
GENERAL DESCRIPTION
The quadrature demodulator controller TDA8041H,
generates all control signals required for demodulation of
BPSK and QPSK modulated signals. This device is
specially designed to be used in conjunction with the
quadrature demodulator IC, TDA8040T.
The quadrature demodulator controller generates the
following signals:
• Symbol clock recovery control signal; this signal locks
the VCXO to the received symbol clock. The clock
recovery algorithm used in this device operates
independently from the other loops.
• Carrier recovery control signal; depending on the
selected mode (BPSK or QPSK), this signal will adjust
the phase of the I and Q input signal. This adjustment
will be such that the constellation points are as defined
in Fig.4.
• Frequency control signals (AFC1 and AFC2); to serve a
broad range of applications, two different AFC detectors
and a sweep function are built-in:
– AFC1: this is a robust detector which forces the offset
frequency in the I and Q branch to zero. This detector
can handle frequency offset up to 1/8 × symbol rate.
– AFC2: this detector can handle frequency offsets
greater than 1/8 × symbol frequency. However this
AFC algorithm will bring the offset frequency only
close to zero.
– Sweep: this signal generates a triangular current
output which can tune a VCO over its complete
frequency range. Sweeping must be switched off as
soon as the logical output of the lock detect function
becomes positive. The value of the sweep current is
set by an external resistor.
• Amplitude control signals (AGC); this signal adjusts a
variable gain amplifier so that the amplitude of the I and
Q signals is in accordance with the specified
constellation points of Fig.4.
• Lock detect signal; this signal is related to the E_b/N_o of
the incoming I and Q signals. This lock detect signal can
be used for two purposes:
– Lock detection by comparing the lock detect signal
with an external set reference voltage, one can obtain
a logical signal indicating lock detect.
– The relationship between E_b/N_o can be used to
display the E_b/N_o for antenna adjustment.
FUNCTIONAL DESCRIPTION
The TDA8041H has a 3-bit-wide digital I and Q output for
soft error correction. These 3-bit outputs represent the
main symbols only. The relationship between the 4-bits
ADC signals and the 3-bit output signals is illustrated in
Fig.3.
Fig.3 I and Q output levels for soft error
decision FEC.
November 1994
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