TDA8041H Datasheet, PDF (3/16 Pages) NXP Semiconductors – Quadrature demodulator controller

CLK2
IDO0 to IDO2
31 to 33
3
LCKDAC
44
LCKTC
1
LCKO
2
I _ana
Vref(pos)
Vref(mid)
Vref(neg)
mode
control
BQN
AFC1
AFC2
TEST
Q _ana
I _bias
18
A4
ADC
LOGIC
4
I (3..0)
LOCK data ^{LCK 4}
DAC
I _LCK
DETECTOR
4
LCKIO
VDD
R4
7
R3
8
R2
9
R1
VSS
38
36
37
40
TDA8041H
CLK1
Vref(mid)
CARRIER data ^{CAR 4}
RECOVERY
DAC
I _CAR
LOGIC
CLK1
Vref(mid)
V _th
AFC2
data ^{AFC2 5}
DAC
I _AFC2
AGC
CLK1
data ^{AGC 2}
DAC
I _AGC
3
LCKTH
15
CARTC
16
CARO
39
SWEEP
14
SWPO
10
AFC2O
12
AGCTC
13 _AGCO
19
ADC ^{A 4}
LOGIC
4
CLK2
I _bias
41
BIAS
I _bias
GENERATOR _Ibias
ADC ³
DAC
OPAMP
CLK1
Q (3..0)
CLOCK data
RECOVERY
CLK
5
DAC
Vref(mid)
I _CLK
CLK1
CLK1
Vref(mid)
CLK2
CLK1
21
CLKRTC
22
CLKRO
23
CLKIX
25
2
CLKSR
26 to 28 5 6
11 17
20 24 29 30
34 35 42 43
MBE167
QDO0 to QDO2
VSS(A)
VSSA(C)
VSS1
VDD(I/O)
VDDD
VSS(C)
VDD(A)
VSS2
VDDA(C) VSS(I/O)
VSSD
VDD(C)
Fig.1 Block diagram.