74HC4510 Datasheet, PDF (8/12 Pages) NXP Semiconductors – BCD up/down counter

Philips Semiconductors
BCD up/down counter
Product specification
74HC/HCT4510
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆I_CC) for a unit load of 1 is given in the family specifications.
To determine ∆I_CC per input, multiply this value by the unit load coefficient shown in the table below
INPUT
UNIT LOAD COEFFICIENT
D_n
0.75
PL, CE
1.00
UP/DN
1.00
CP
1.25
MR
1.50
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HCT
+25
−40 to +85
−40 to +125
UNIT _VCC WAVEFORMS
(V)
min. typ. max. min. max. min. max.
t_PHL/ t_PLH
t_PHL
t_PLH/ t_PHL
t_PHL/ t_PLH
propagation delay
CP to Q_n
propagation delay
MR to Q_n
propagation delay
PL to Q_n
propagation delay
CP to TC
27 50
63
25 42
53
28 53
66
29 58
73
75 ns
63 ns
80 ns
87 ns
4.5 Fig.7
4.5 Fig.10
4.5 Fig.9
4.5 Fig.7
t_PHL/ t_PLH propagation delay
CE to TC
17 31
39
47 ns
4.5 Fig.8
t_PLH
propagation delay
MR to TC
31 50
63
75 ns
4.5 Fig.10
t_PHL/ t_PLH propagation delay
PL to TC
35 68
85
102 ns
4.5 Fig.10
t_THL/ t_TLH output transition time
7 15
19
22 ns
t_W
pulse width CP, CE 16 9
20
24
ns
HIGH or LOW
t_W
parallel load pulse 16 6
20
24
ns
width
HIGH
4.5 Fig.9
4.5 Fig.7
4.5 Fig.10
t_W
master reset pulse 20 4
width
HIGH
25
30
ns
4.5 Fig.10
December 1990
8