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TDA8755 Datasheet, PDF (7/20 Pages) NXP Semiconductors – YUV 8-bit video low-power analog-to-digital interface | |||
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Philips Semiconductors
YUV 8-bit video low-power
analog-to-digital interface
Product speciï¬cation
TDA8755
SYMBOL
PARAMETER
CONDITIONS
INU AND INV (PINS 7 AND 9)
VI(p-p)
input voltage, full range
(peak-to-peak value)
ZI
input impedance
CI
input capacitance
INPUTS ISOLATION
αct
crosstalk between Y, U and V
Outputs
fi = 1.5 MHz
fi = 2 MHz
fi = 2 MHz
SDN (PIN 8)
Vref
VREG
IL
reference voltage
line regulation
load current
4.75 V ⤠VCCA ⤠5.25 V
DIGITAL OUTPUTS D0 TO D7 AND Dâ0 TO Dâ3 (PINS 24 TO 31 AND 19 TO 22)
VOL
LOW level output voltage
IO = 0.4 mA
IO = 1.5 mA
VOH
HIGH level output voltage
IO = â0.4 mA
IOZ
output current in 3-state mode
0.4 V < VO < VCCD
Switching characteristics
fclk(max)
fclk(min)
tCPH
tCPL
maximum clock frequency
minimum clock frequency
clock pulse width HIGH
clock pulse width LOW
Analog signal processing (fclk = 20 MHz; 50% clock duty factor)
Gdiff
differential gain
note 1; see Fig.8
Ïdiff
differential phase
note 1; see Fig.8
f1
fundamental harmonics (full-scale) note 2
fall
harmonics (full-scale),
all components
note 2; see Fig.10
SVRR1
supply voltage ripple rejection 1 note 3
SVRR2
supply voltage ripple rejection 2 note 3
Transfer function (50% clock duty factor)
INL
DNL
AILE
EB
DC integral non-linearity
DC differential non-linearity
AC integral non-linearity
effective bits
fclk = 2 MHz
fclk = 2 MHz
note 4
note 5; Fig.10
MIN. TYP. MAX. UNIT
0.93 1.03 1.13 V
â
30
â
kâ¦
â
1
â
pF
â
â55
â50
dB
â
3.32 â
V
â
4.0
â
mV
â2
â
â
mA
0
â
0
â
2.4
â
â20
â
0.4
V
0.5
V
VCCD
V
+20
µA
20
â
â
â
20
â
20
â
â
MHz
2.0
MHz
â
ns
â
ns
â
2
â
%
â
3
â
deg
â
â
0
dB
â
â54
â
dB
â
â40
â
dB
â
1.0
â
%/V
â
±0.4 ±1.0 LSB
â
±0.3 ±0.5 LSB
â
±1.0 ±2.0 LSB
â
7.1
â
bits
1995 Mar 09
7
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