TDA8310A Datasheet, PDF (7/24 Pages) NXP Semiconductors – PAL/NTSC colour processor for PIP applications

Philips Semiconductors
PAL/NTSC colour processor
for PIP applications
Product specification
TDA8310A
FUNCTIONAL DESCRIPTION
CVBS switch
The circuit contains a 2 input CVBS switch and one of
the inputs can be switched between CVBS and Y/C.
The circuit contains an identification circuit which can
automatically switch between the CVBS and Y/C signals.
It is also possible to force the switch to CVBS or Y/C.
Synchronization circuit
The sync separator is preceded by a voltage controlled
amplifier which adjusts the sync pulse amplitude to a fixed
level. The sync pulses are fed to the slicing stage
(separator) which operates at 50% of the amplitude.
The separated sync pulses are fed to the first phase
detector and to the coincidence detector. The coincidence
detector is used to detect whether the line oscillator is
synchronized and for transmitter identification. The first
PLL has a very high static steepness this ensures that the
phase of the picture is independent of the line frequency.
The line oscillator operates at twice the line frequency.
The oscillator network is internal. Because of the spread of
internal components an automatic adjustment circuit has
been added to the IC.
The circuit compares the oscillator frequency with that of
the crystal oscillator in the colour decoder. This results in
a free-running frequency which deviates less than 2%
from the typical value.
The horizontal output pulse is derived from the horizontal
oscillator via a pulse shaper. The pulse width of the output
pulse is 5.4 µs, the front edge of this pulse coincides with
the front edge of the sync pulse at the input.
The vertical output pulse is generated by a count-down
circuit. The pulse width is approximately 380 µs. Both the
horizontal and vertical output pulses will always be
available at the outputs even when no input signal is
available.
In addition to the horizontal and vertical sync pulse outputs
the IC has a sandcastle pulse output which contains burst
key and blanking pulses.
Integrated video filters
The circuit contains a chrominance bandpass and trap
circuit. The filters are realised by gyrator circuits that are
automatically tuned by comparing the tuning frequency
with the crystal frequency of the decoder. When a Y/C
signal is supplied to the input the chrominance trap is
automatically switched off by the Y/C detection circuit
however, it is also possible to force the filters in the CVBS
or Y/C position.
The luminance delay line is also realised by gyrator
circuits.
Colour decoder
The colour decoder contains an alignment-free crystal
oscillator, a colour killer circuit and colour difference
demodulators. The 90° phase shift for the reference signal
is achieved internally.
The colour decoder is very flexible. Together with the
SECAM decoder (TDA8395) an automatic multistandard
decoder can be designed but it is also possible to use it for
one standard when only one crystal is connected to the IC.
The decoder can be forced to one of the standards via the
‘forced mode’ pins. The crystal pins which are not used
must be connected to the positive supply line via a 8.2 kΩ
resistor. It is also possible to connect the non-used pins
with one resistor to the positive supply line. In this event
the resistor must have a value of 8.2 kΩ divided by the
number of pins.
The chrominance output signal of the video switch is
externally available and must be used as an input signal
for the SECAM decoder.
RGB/YUV switch
The RGB/YUV switch is for switching between two RGB or
YUV video sources. The outputs of the switch can be set
to high-impedance state so that other switches can be
used in parallel.
The switch is controlled via pins 13 and 52. The details of
switch control are shown in Table 4.
1996 Jan 25
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