74HC_HCT2G125_15 Datasheet, PDF (7/15 Pages) NXP Semiconductors – Dual buffer/line driver; 3-state

NXP Semiconductors
12. Waveforms and test circuit
74HC2G125; 74HCT2G125
Dual buffer/line driver; 3-state
9_,
LQSXW
Q$
*1'
9₂₊
RXWSXW
Q<
9_2/
9₀
W_3+/
9₀
W _7+/
9₀
90

W _3/+

W _7/+
DDG
Fig 6.
Measurement points are given in Table 9.
Logic levels: V_OL and V_OH are typical output voltage levels that occur with the output load.
Propagation delays data input (nA) to output (nY)
9_,
Q2(LQSXW
*1'
9_&&
RXWSXW
/2:WR2))
2))WR/2:
9_2/
9₂₊
RXWSXW
+,*+WR2))
2))WR+,*+
*1'
9₀
W_3/=
W_3=/
W₃₊₌
9_;
9_<
9₀
W₃₌₊
9₀
RXWSXWV
HQDEOHG
RXWSXWV
GLVDEOHG
RXWSXWV
HQDEOHG
PQD
Fig 7.
Measurement points are given in Table 9.
Logic levels: V_OL and V_OH are typical output voltage levels that occur with the output load.
Enable and disable times
Table 9. Measurement points
Type
Input
74HC2G125
74HCT2G125
V_M
0.5V_CC
1.3 V
Output
V_M
0.5V_CC
1.3 V
V_X
V_OL + 0.3 V
V_OL + 0.3 V
V_Y
V_OH  0.3 V
V_OH  0.3 V
74HC_HCT2G125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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