74HC195 Datasheet, PDF (7/9 Pages) NXP Semiconductors – 4-bit parallel access shift register

Philips Semiconductors
4-bit parallel access shift register
Product specification
74HC/HCT195
DC CHARACTERISTICS FOR HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆I_CC) for a unit load of 1 is given in the family specifications.
To determine ∆I_CC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
PE
all others
UNIT LOAD COEFFICIENT
0.65
0.35
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
SYMBOL PARAMETER
t_PHL/ t_PLH
t_PHL
t_THL/ t_TLH
propagation delay
CP to Q_n
propagation delay
MR to Q_n
output transition time
T_amb (°C)
TEST CONDITIONS
74HCT
+25
−40 to +85
−40 to +125
UNIT
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
18 32
40
48 ns 4.5 Fig.6
17 35
44
53 ns 4.5 Fig.8
7 15
19
22 ns 4.5 Fig.6
t_W
clock pulse width
HIGH or LOW
20 6
25
30
ns 4.5 Fig.6
t_W
master reset pulse width 16 6
LOW
20
24
ns 4.5 Fig.8
t_rem
removal time
MR to CP
16 6
20
24
ns 4.5 Fig.8
t_su
set-up time
J, K, PE to CP
20 12
25
30
ns 4.5 Figs 8 and 9
t_su
set-up time
D_n to CP
16 6
20
24
ns 4.5 Figs 8 and 9
t_h
hold time
3 −5
3
3
ns 4.5 Figs 8 and 9
J, K, PE, D_n to CP
f_max
maximum clock pulse
27 52
22
18
MHz 4.5 Fig.6
frequency
December 1990
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