UMA1020M Datasheet, PDF (6/20 Pages) NXP Semiconductors – Low-voltage dual frequency synthesizer for radio telephones

Table 1 Format of programmed data
LAST IN
p21
ADD0
p20
p19
ADD1
ADD2
LATCH ADDRESS
PROGRAMMING REGISTER BIT USAGE
p18
p17
p16
../..
p2
ADD3
DATA0
DATA1
../..
DATA15
LSB
DATA COEFFICIENT
FIRST IN
p1
DATA16
MSB
Table 2 Bit allocation (note 1)
FT
REGISTER BIT ALLOCATION
LT
p1
p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 p16 p17 p18 p19 p20 p21
dt16 dt15 dt14 dt13 dt12
DATA FIELD
TEST BITS⁽²⁾
dt4 dt3 dt2 dt1 dt0
ADDRESS
00 0 0
X
XXX
OLP OLA CR1 CR0 X X sPOFF sAOFF X X X X X
00 0 1
PM16
PRINCIPAL MAIN DIVIDER COEFFICIENT
PM0 0 1 0 0
X
XXX
X X PR10
PRINCIPAL REFERENCE DIVIDER COEFFICIENT
PR0 0 1 0 1
X
X X AM13
AUXILIARY MAIN DIVIDER COEFFICIENT
AM0 0 1 1 0
X
XXX
X X AR10
AUXILIARY REFERENCE DIVIDER COEFFICIENT
AR0 0 1 1 1
X
XXX
XXX
XX
0 DA6
7-BIT DAC
DA0 1 0 0 0
Notes
1. FT = first; LT = last; sPOFF = software power-down for principal synthesizer (1 = OFF); sAOFF = software power-down for auxiliary synthesizer
(1 = OFF).
2. The test register should not be programmed with any other value except all zeros for normal operation.
Table 3 Out-of-lock select
OLP
0
0
1
1
OLA
0
1
0
1
output disabled
auxiliary phase error
principal phase error
both auxiliary and principal
OUT-OF-LOCK ON PIN 20