UMA1020M Datasheet, PDF (11/20 Pages) NXP Semiconductors – Low-voltage dual frequency synthesizer for radio telephones

Philips Semiconductors
Low-voltage dual frequency
synthesizer for radio telephones
Product specification
UMA1020M
SERIAL BUS TIMING CHARACTERISTICS
V_DD = V_CC = 3 V; T_amb = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Serial programming clock; CLK
t_r
input rise time
t_f
input fall time
T_cy
clock period
Enable programming; E
t_START
t_END
t_W
t_SU;E
delay to rising clock edge
delay from last falling clock edge
minimum inactive pulse width
enable set-up time to next clock edge
Register serial input data; DATA
t_SU;DAT
t_HD;DAT
input data to clock set-up time
input data to clock hold time
−
10
40
ns
−
10
40
ns
100
−
−
ns
40
−
−
ns
−20
−
−
ns
4000⁽¹⁾ −
−
ns
20
−
−
ns
20
−
−
ns
20
−
−
ns
Note
1. The minimum pulse width (t_W) can be smaller than 4 µs provided all the following conditions are satisfied:
a) Principal main divider input frequency f_VCO > ^5--t--1_W---2--
b) Auxiliary main divider input frequency f_AI > ^3-t--_W-2--
c) Reference dividers input frequency f_XTAL > _t--3W---
1995 Jun 15
Fig.3 Serial bus timing diagram.
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