TDA8008 Datasheet, PDF (6/12 Pages) NXP Semiconductors – Dual multiprotocol smart card coupler

Philips Semiconductors
Dual multiprotocol smart card coupler
Objective specification
TDA8008
SYMBOL PIN
DESCRIPTION
TEST
36 test pin (must be left open-circuit in the application)
IOAUX
37 input or output for an I/O line issued on an auxiliary smart card interface
CS
38 chip select input (active LOW)
RSTOUT
39 open-drain output for resetting external chips
n.c.
40 not connected
P30/RXD
41 8xC51 general purpose I/O port/serial input port
P31/TXD
42 8xC51 general purpose I/O port/serial output port
P32/INT0
43 8xC51 general purpose I/O port/external interrupt 0
P33/INT1
44 8xC51 general purpose I/O port/external interrupt 1
P34/T0
45 8xC51 general purpose I/O port/Timer 0 external input
P35/T1
46 8xC51 general purpose I/O port/Timer 1 external input
P36/WR
47 8xC51 general purpose I/O port/external data memory write strobe
P37/RD
48 8xC51 general purpose I/O port/external data memory read strobe
XTAL2
49 connection pin for an external crystal (output from the inverting oscillator amplifier)
XTAL1
50 connection pin for an external crystal, or input for an external clock signal (input to the
inverting oscillator amplifier and input to the internal clock generator circuits)
V_DDD
GNDD
51 digital supply voltage
52 digital ground
P20/A8
53 8xC51 general purpose I/O port/address 8
P21/A9
54 8xC51 general purpose I/O port/address 9
P22/A10
55 8xC51 general purpose I/O port/address 10
P23/A11
56 8xC51 general purpose I/O port/address 11
P24/A12
57 8xC51 general purpose I/O port/address 12
n.c.
58 not connected
n.c.
59 not connected
P25/A13
60 8xC51 general purpose I/O port/address 13
P26/A14
61 8xC51 general purpose I/O port/address 14
P27/A15
62 8xC51 general purpose I/O port/address 15
PSEN
63 Program store enable output: this is the read strobe to the external program memory. When
executing code from the external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during each access to external data
memory. PSEN is not activated during fetches from internal program memory.
ALE/PROG 64 Address latch enable/program pulse: this is the output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE pulses are emitted at
a constant rate of ¹â„₆ of the oscillator frequency and can be used for external timing or
clocking. It should be noted that one ALE pulse is skipped during each access to external data
memory. This pin is also the program pulse input (PROG) during EPROM programming. ALE
can be disabled by setting bit SFR Auxiliary 0. With this bit set, ALE will be active only during
a MOVX instruction.
1999 Dec 14
6