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| PSMN2R2-40BS Datasheet, PDF (6/15 Pages) NXP Semiconductors – N-channel 40 V 2.2 m standard level MOSFET in D2PAK | |||
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NXP Semiconductors
PSMN2R2-40BS
N-channel 40 V 2.2 m⦠standard level MOSFET in D2PAK
7. Characteristics
Table 7. Characteristics
Tested to JEDEC standards where applicable.
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 11
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 12; see Figure 11
IDSS
IGSS
RDSon
drain leakage current
VDS = 40 V; VGS = 0 V; Tj = 25 °C
VDS = 40 V; VGS = 0 V; Tj = 125 °C
gate leakage current
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 6
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 13; see Figure 6
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 6; see Figure 13
RG
internal gate resistance (AC)
Dynamic characteristics
f = 1 MHz
QG(tot)
QGS
QGS(th)
total gate charge
gate-source charge
pre-threshold gate-source
charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 20 V; VGS = 10 V;
see Figure 14; see Figure 15
QGS(th-pl)
post-threshold gate-source
charge
QGD
VGS(pl)
gate-drain charge
gate-source plateau voltage
ID = 25 A; VDS = 20 V; see Figure 14;
see Figure 15
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 20 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
VDS = 20 V; RL = 0.25 â¦; VGS = 10 V;
RG(ext) = 1.5 â¦
Min Typ Max Unit
36 -
40 -
-
-
-
V
-
V
4.6 V
1
-
-
V
2
3
4
V
-
0.02 10 µA
-
-
200 µA
-
10
100 nA
-
10
100 nA
-
2.73 3.2 mâ¦
-
3.76 4.4 mâ¦
-
1.88 2.2 mâ¦
-
1
-
â¦
-
110 -
nC
-
130 -
nC
-
42
-
nC
-
24
-
nC
-
18
-
nC
-
25 -
nC
-
4.95 -
V
-
8423 -
pF
-
1671 -
pF
-
814 -
pF
-
33.2 -
ns
-
40.4 -
ns
-
66.6 -
ns
-
25.2 -
ns
PSMN2R2-40BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 20 March 2012
© NXP B.V. 2012. All rights reserved.
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