PSMN025-100D Datasheet, PDF (6/9 Pages) NXP Semiconductors – N-channel TrenchMOS SiliconMAX standard level FET

Philips Semiconductors
N-channel TrenchMOS™ transistor
Product specification
PSMN025-100D
Gate-source voltage, VGS (V)
15
14 ID = 45A
13
12
Tj = 25 C
11
VDD = 20 V
10
9
8
7
6
5
4
3
2
1
0
VDD = 80 V
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80
Gate charge, QG (nC)
Fig.13. Typical turn-on gate-charge characteristics.
V_GS = f(Q_G)
Source-Drain Diode Current, IF (A)
50
VGS = 0 V
45
40
35
30
175 C
25
Tj = 25 C
20
15
10
5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Source-Drain Voltage, VSDS (V)
Fig.14. Typical reverse diode current.
I_F = f(V_SDS); conditions: V_GS = 0 V; parameter T_j
Maximum Avalanche Current, IAS (A)
100
10
Tj prior to avalanche = 150 C
25 C
1
0.001
0.01
0.1
1
10
Avalanche time, tAV (ms)
Fig.15. Maximum permissible non-repetitive
avalanche current (I_AS) versus avalanche time (t_AV);
unclamped inductive load
August 1999
6
Rev 1.000