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BUK7E2R6-60E_15 Datasheet, PDF (6/13 Pages) NXP Semiconductors – N-channel TrenchMOS standard level FET
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NXP Semiconductors
BUK7E2R6-60E
N-channel TrenchMOS standard level FET
Symbol
Parameter
Conditions
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; Fig. 15
Crss
reverse transfer
capacitance
td(on)
tr
turn-on delay time
rise time
VDS = 45 V; RL = 1.8 Ω; VGS = 10 V;
RG(ext) = 5 Ω
td(off)
turn-off delay time
tf
fall time
LD
internal drain
from upper edge of mounting base to
inductance
centre of die
from drain lead 6mm frompackage to
centre of die
LS
internal source
measured from source lead to source
inductance
bond pad
Source-drain diode
VSD
source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16
trr
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
Qr
recovered charge
VDS = 25 V
Min Typ Max Unit
-
9380 11180 pF
-
1066 1280 pF
-
642 880 pF
-
36
-
ns
-
50
-
ns
-
130 -
ns
-
71
-
ns
-
2.5 -
nH
-
4.5 -
nH
-
7.5 -
nH
-
0.77 1.2 V
-
54
-
ns
-
89
-
nC
360
ID
(A)
240
VGS(V) = 10 7
003aai129
6
5.5
5
10
RDSon
(mΩ)
7.5
003aai130
5
120
4.5
2.5
4
0
0
0.5
1 VDS(V) 1.5
0
0
5
10
15 VGS(V) 20
Fig. 6.
Tj = 25 °C; tp = 300 μs
Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 7.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
BUK7E2R6-60E
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 September 2012
© NXP B.V. 2012. All rights reserved
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