80C453 Datasheet, PDF (6/23 Pages) NXP Semiconductors – CMOS single-chip 8-bit microcontrollers

Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Preliminary specification
80C453/83C453/87C453
IE REGISTER
0
IE.0
INT0
IT0
1
IE.1
TF0
0
IE.2
INT1
IT1
1
IE.3
TF1
IP REGISTER
HIGH PRIORITY
INTERRUPT
INTERRUPT
POLLING
SEQUENCE
RI
TI
IBF
OBF
BIT
IE.7
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
IE.4
IE.5
IE.6
INDIVIDUAL
ENABLES
GLOBAL
DISABLE
Figure 1. 8XC453 Interrupt Control System
LOW PRIORITY
INTERRUPT
SU00562
MSB
EA
IOB
IIB
LSB
ES
ET1 EX1 ET0 EX0
SYMBOL
EA
IOB
IIB
ES
ET1
EX1
ET0
EX0
FUNCTION
Disables all interrupts. If EA=0, no interrupt will be acknowledged. If EA=1, each interrupt
source is individually enabled or disabled by setting or clearing its enable bit.
Enables or disables the Output Buffer Full (OBF) interrupt. If IOB=0, the interrupt is disabled,
If IOB=1, an interrupt will occur if EA is set and data has been read from the output buffer
register through Port 6 by the external host pulsing ODS low.
Enables or disables the Input Buffer Full (IBF) interrupt. If IIB=0, the interrupt is disabled. If
IIB=1, an interrupt will occur if EA is set and data has been written into the Port 6 Input Data
Buffer by the host strobing IDS low.
Enables or disables the Serial Port Interrupt. If ES=0, the Serial Port Interrupt. If ES=0, the
Serial Port interrupt is disabled.
Enables or disables the Timer 1 Overflow interrupt. If ET1=0, the Timer 1 interrupt is disabled.
Enables or disables External Interrupt 1. If EX1=0, External Interrupt 1 is disabled.
Enables or disables the Timer 0 Overflow interrupt. If ET0=0, the Timer 0 interrupt is disabled.
Enables or disables External Interrupt 0. If EX0=0, external Interrupt 0 is disabled.
Figure 2. 8XC453 Interrupt Enable (IE) Register
SU00563
1996 Aug 15
3-316