74HC4094 Datasheet, PDF (6/10 Pages) NXP Semiconductors – 8-stage shift-and-store bus register

Philips Semiconductors
8-stage shift-and-store bus register
Product specification
74HC/HCT4094
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT
V_CC ^WAVEFORMS
(V)
min. typ. max. min. max. min. max.
t_PHL/ t_PLH propagation delay
CP to QS₁
t_PHL/ t_PLH propagation delay
CP to QS₂
50 150
190
225 ns 2.0 Fig.7
18 30
38
45
4.5
14 26
33
38
6.0
44 135
170
205 ns 2.0 Fig.7
16 27
34
41
4.5
13 23
29
35
6.0
t_PHL/ t_PLH propagation delay
CP to QP_n
63 195
245
295 ns 2.0 Fig.7
23 39
49
59
4.5
18 33
42
50
6.0
t_PHL/ t_PLH propagation delay
STR to QP_n
58 180
225
270 ns 2.0 Fig.8
21 36
45
54
4.5
17 31
38
46
6.0
t_PZH/ t_PZL 3-state output enable time
55 175
220
265 ns 2.0 Fig.9
OE to QP_n
20 35
44
53
4.5
16 30
37
45
6.0
t_PHZ/ t_PLZ 3-state output disable
time OE to QP_n
41 125
155
190 ns 2.0 Fig.9
15 25
31
38
4.5
12 21
26
32
6.0
t_THL/ t_TLH output transition time
t_W
clock pulse width
HIGH or LOW
19 75
7 15
6 13
80 14
16 5
14 4
95
19
16
100
20
17
110 ns
22
19
120
ns
24
20
2.0 Fig.7
4.5
2.0 Fig.7
4.5
6.0
t_W
strobe pulse width
80 14
100
120
ns 2.0 Fig.8
HIGH
16 5
20
24
4.5
14 4
17
20
6.0
t_su
set-up time
D to CP
t_su
set-up time
CP to STR
50 14
65
75
ns 2.0 Fig.10
10 5
13
15
4.5
94
11
13
6.0
100 28
125
150
ns 2.0 Fig.8
20 10
25
30
4.5
17 8
21
26
6.0
December 1990
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