74HC4094 Datasheet, PDF (2/10 Pages) NXP Semiconductors – 8-stage shift-and-store bus register

Philips Semiconductors
8-stage shift-and-store bus register
Product specification
74HC/HCT4094
FEATURES
• Output capability: standard
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4094 are high-speed Si-gate CMOS
devices and are pin compatible with the “4094” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4094 are 8-stage serial shift registers
having a storage latch associated with each stage for
strobing data from the serial input (D) to the parallel
buffered 3-state outputs (QP₀ to QP₇). The parallel outputs
may be connected directly to common bus lines.
Data is shifted on the positive-going clock (CP) transitions.
The data in each shift register stage is transferred to the
storage register when the strobe input (STR) is HIGH.
Data in the storage register appears at the outputs
whenever the output enable input (OE) signal is HIGH.
Two serial outputs (QS₁ and QS₂) are available for
cascading a number of “4094” devices. Data is available at
QS₁ on the positive-going clock edges to allow high-speed
operation in cascaded systems in which the clock rise time
is fast. The same serial information is available at QS₂ on
the next negative-going clock edge and is for cascading
“4094” devices when the clock rise time is slow.
APPLICATIONS
• Serial-to-parallel data conversion
• Remote control holding register
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
t_PHL/ t_PLH
f_max
C_I
C_PD
propagation delay
CP to QS₁
CP to QS₂
CP to QP_n
STR to QP_n
maximum clock frequency
input capacitance
power dissipation capacitance per package
C_L = 15 pF; V_CC = 5 V
notes 1 and 2
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
TYPICAL
HC
HCT
15
19
13
18
20
21
18
19
95
86
3.5
3.5
83
92
UNIT
ns
ns
ns
ns
MHz
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2