English
Language : 

74F842 Datasheet, PDF (6/12 Pages) NXP Semiconductors – Bus interface latches
Philips Semiconductors
10-bit bus interface latches, non-inverting/inverting
(3-State)
Product data
74F841/74F842
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
MIN TYP2 MAX
UNIT
VOH
HIGH-level output voltage
VOL
LOW-level output voltage
± 10%VCC 2.2
–
–
V
VCC = MIN;
IOH = –15 mA ± 5%VCC
2.2
3.3
–
V
VIL = MAX;
VIH = MIN
± 10%VCC 2.0
–
–
V
IOH = –24 mA
± 5%VCC
2.0
–
–
V
VCC = MIN; IOL = 32 mA ± 10%VCC
–
0.38 0.55
V
VIL = MAX;
VIH = MIN
IOL = 48 mA ± 5%VCC
–
0.38 0.55
V
VIK
II
IIH
IIL
IOZH
Input clamp voltage
Input current at maximum input voltage
HIGH-level input current
LOW-level input current
Off-state output current,
HIGH-level voltage applied
VCC = MIN; II = IIK
VCC = 0 V; VI = 7.0 V
VCC = MAX; VI = 2.7 V
VCC = MAX; VI = 0.5 V
VCC = MAX; VO = 2.7 V
–
–0.73 –1.2
V
–
–
100
µA
–
–
20
µA
–
–
–20
µA
–
–
50
µA
IOZL
Off-state output current,
LOW-level voltage applied
VCC = MAX; VO = 0.5 V
–
–
–50
µA
IOS
Short-circuit output current3
VCC = MAX
–100
–
–225
mA
ICCH
–
50
65
mA
74F841 ICCL
VCC = MAX
–
60
80
mA
ICC
Supply current
(total)
ICCZ
ICCH
–
70
92
mA
–
40
60
mA
74F842 ICCL
VCC = MAX
–
65
90
mA
ICCZ
–
60
90
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5 V, Tamb = 25 °C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged
shorting of a HIGH output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests.
In any sequence of parameter test, IOS tests should be performed last.
2004 Jan 23
6