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74F604 Datasheet, PDF (6/7 Pages) NXP Semiconductors – Dual octal latch 3-State
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Philips Semiconductors
Dual octal latch (3-State)
Product specification
74F604
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
ts(H)
ts(L)
th(H)
th(L)
tW(L)
Setup time, High or Low
An, Bn to LE
Hold time, High or Low
An, Bn to LE
LE Pulse width, Low
TEST
CONDITION
Waveform 3
Waveform 3
Waveform 3
LIMITS
VCC = +5V
Tamb = +25°C
CL = 50pF, RL = 500Ω
MIN TYP MAX
VCC = +5V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500Ω
MIN
MAX
1.0
2.0
2.0
3.0
0
0
1.0
1.5
5.0
6.0
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
UNIT
ns
ns
ns
SELECT A/B
Qn
VM
VM
tPHL
tPLH
VM
VM
SF01119
Waveform 1. Propagation Delay, SELECT A/B To Output
(B latched data=Low. LE=H)
An, Bn
LE
VM
ts(H)
VM
th(H)
VM
VM
VM
ts(L)
tw(L)
VM
VM
th(L)
SF01121
Waveform 3. Data Setup and Hold Times,
Latch Enable Pulse Width
SELECT A/B
Qn
VM
VM
tPHL
tPLH
VM
VM
SF01120
Waveform 2. Propagation Delay, SELECT A/B to Output
(A latched data=Low. LE=H)
LE
VM
VM
tPZH
tPHZ
Qn
VM
VOH -0.3V
0V
SF01122
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
LE
VM
VM
tPZL
tPLZ
Qn
VM
VOL +0.3V
SF01123
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
1990 Mar 01
6
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